• Digital Logic Design - Lecture 22: Sequential Circuits AnalysisDigital Logic Design - Lecture 22: Sequential Circuits Analysis

    Sequential circuit consists of A combinational circuit that produces output A feedback circuit We use JK flip-flops for the feedback circuit Simple counter examples using JK flip-flops Provides alternative counter designs We know the output Need to know the input combination that produces this output Use an excitation table Built from th...

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  • Digital Logic Design - Lecture 21: Sequential Circuits: Flip flopsDigital Logic Design - Lecture 21: Sequential Circuits: Flip flops

    Flip flops are powerful storage elements They can be constructed from gates and latches! D flip flop is simplest and most widely used Asynchronous inputs allow for clearing and presetting the flip flop output Multiple flops allow for data storage The basis of computer memory! Combine storage and logic to make a computation circuit

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  • Digital Logic Design - Lecture 20: Sequential Circuits LatchesDigital Logic Design - Lecture 20: Sequential Circuits Latches

    Latches are based on combinational gates (e.g. NAND, NOR) Latches store data even after data input has been removed S-R latches operate like cross-coupled inverters with control inputs (S = set, R = reset) With additional gates, an S-R latch can be converted to a D latch (D stands for data) D latch is simple to understand conceptually When C =...

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  • Digital Logic Design - Lecture 19: Recap IIDigital Logic Design - Lecture 19: Recap II

    Performs the inverse of the operation of a MUX It has one input line, the input from which is transmitted to one of 2n output lines The output lines are selected based on the select inputs

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  • Digital Logic Design - Lecture 18: RecapDigital Logic Design - Lecture 18: Recap

    1s complement with negative numbers shifted one position clockwise Only one representation for 0 One more negative number than positive number High-order bit can act as sign bit

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  • Digital Logic Design - Lecture 17: Problems (Mano)Digital Logic Design - Lecture 17: Problems (Mano)

    Must solve as much problems as possible Tristate buffers have three types of outputs 0, 1, high-impedence (Z) Useful for datapaths

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  • Digital Logic Design - Lecture 16: More Multiplexers, Encoders and DecodersDigital Logic Design - Lecture 16: More Multiplexers, Encoders and Decoders

    Decoder allows for generation of a single binary output from an input binary code For an n-input binary decoder there are 2n outputs Decoders are widely used in storage devices (e.g. memories) Encoders all for data compression Priority encoders rank inputs and encode the highest priority input

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  • Digital Logic Design - Lecture 15: Magnitude Comparators and MultiplexersDigital Logic Design - Lecture 15: Magnitude Comparators and Multiplexers

    Magnitude comparators allow for data comparison Can be built using and-or gates Greater/less than requires more hardware than equality Multiplexers are fundamental digital components Can be used for logic Useful for datapaths Scalable Tristate buffers have three types of outputs 0, 1, high-impedence (Z) Useful for datapaths

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  • Digital Logic Design - Lecture 14: Binary Adders and SubtractorsDigital Logic Design - Lecture 14: Binary Adders and Subtractors

    BCD digits are valid for decimal numbers 0-9 Addition of two BCD numbers will generate an output, that may be greater than 1001 (9). In such cases, the BCD number 0110 is added to the result as a correction step When adding two BCD numbers, the maximum result that can be obtained is: 9 + 9 = 18 If we include a carry in bit, then the maximum r...

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  • Digital Logic Design - Lecture 13: Problems (Mano)Digital Logic Design - Lecture 13: Problems (Mano)

    Problem: Output in binary on two outputs yz the number of 1s on three inputs 010  01 101  10 000  00 Step 1: Capture the function Truth table or equation? Truth table is straightforward Step 2: Convert to equation y = a’bc + ab’c + abc’ + abc z = a’b’c + a’bc’ + ab’c’ + abc Step 3: Implement as a gate-based circuit

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