William stallings computer organization and architecture 6th edition - Chapter 11: Instruction sets: Addressing modes and formats

William Stallings Computer Organization and Architecture6th EditionChapter 11Instruction Sets:Addressing Modesand FormatsAddressing ModesImmediateDirectIndirectRegisterRegister IndirectDisplacement (Indexed) StackImmediate AddressingOperand is part of instructionOperand = address fielde.g. ADD 5Add 5 to contents of accumulator5 is operandNo memory reference to fetch dataFastLimited rangeImmediate Addressing DiagramOperandOpcodeInstructionDirect AddressingAddress field contains address of operandEffective address (EA) = address field (A)e.g. ADD AAdd contents of cell A to accumulatorLook in memory at address A for operandSingle memory reference to access dataNo additional calculations to work out effective addressLimited address spaceDirect Addressing DiagramAddress AOpcodeInstructionMemoryOperandIndirect Addressing (1)Memory cell pointed to by address field contains the address of (pointer to) the operandEA = (A)Look in A, find address (A) and look there for operande.g. ADD (A)Add contents of cell pointed to by contents of A to accumulatorIndirect Addressing (2)Large address space 2n where n = word lengthMay be nested, multilevel, cascadede.g. EA = (((A)))Draw the diagram yourselfMultiple memory accesses to find operandHence slowerIndirect Addressing DiagramAddress AOpcodeInstructionMemoryOperandPointer to operandRegister Addressing (1)Operand is held in register named in address filedEA = RLimited number of registersVery small address field needed Shorter instructionsFaster instruction fetchRegister Addressing (2)No memory accessVery fast executionVery limited address spaceMultiple registers helps performanceRequires good assembly programming or compiler writingN.B. C programming register int a;c.f. Direct addressingRegister Addressing DiagramRegister Address ROpcodeInstructionRegistersOperandRegister Indirect AddressingC.f. indirect addressingEA = (R)Operand is in memory cell pointed to by contents of register RLarge address space (2n)One fewer memory access than indirect addressingRegister Indirect Addressing DiagramRegister Address ROpcodeInstructionMemoryOperandPointer to OperandRegistersDisplacement AddressingEA = A + (R)Address field hold two valuesA = base valueR = register that holds displacementor vice versaDisplacement Addressing DiagramRegister ROpcodeInstructionMemoryOperandPointer to OperandRegistersAddress A+Relative AddressingA version of displacement addressingR = Program counter, PCEA = A + (PC)i.e. get operand from A cells from current location pointed to by PCc.f locality of reference & cache usageBase-Register AddressingA holds displacementR holds pointer to base addressR may be explicit or implicite.g. segment registers in 80x86Indexed AddressingA = baseR = displacementEA = A + RGood for accessing arraysEA = A + RR++CombinationsPostindexEA = (A) + (R)PreindexEA = (A+(R))(Draw the diagrams)Stack AddressingOperand is (implicitly) on top of stacke.g. ADD Pop top two items from stack and addPentium Addressing ModesVirtual or effective address is offset into segmentStarting address plus offset gives linear addressThis goes through page translation if paging enabled12 addressing modes availableImmediateRegister operandDisplacementBaseBase with displacementScaled index with displacementBase with index and displacementBase scaled index with displacementRelativePentium Addressing Mode CalculationPowerPC Addressing ModesLoad/store architectureIndirectInstruction includes 16 bit displacement to be added to base register (may be GP register)Can replace base register content with new addressIndirect indexedInstruction references base register and index register (both may be GP)EA is sum of contentsBranch addressAbsoluteRelativeIndirectArithmeticOperands in registers or part of instructionFloating point is register onlyPowerPC Memory Operand Addressing ModesInstruction FormatsLayout of bits in an instructionIncludes opcodeIncludes (implicit or explicit) operand(s)Usually more than one instruction format in an instruction setInstruction LengthAffected by and affects:Memory sizeMemory organizationBus structureCPU complexityCPU speedTrade off between powerful instruction repertoire and saving spaceAllocation of BitsNumber of addressing modesNumber of operandsRegister versus memoryNumber of register setsAddress rangeAddress granularityPDP-8 Instruction FormatPDP-10 Instruction FormatPDP-11 Instruction FormatVAX Instruction ExamplesPentium Instruction FormatPowerPC Instruction Formats (1)PowerPC Instruction Formats (2)Foreground ReadingStallings chapter 11Intel and PowerPC Web sites