William stallings computer organization and architecture 6th edition - Chapter 10: Instruction sets: Characteristics and functions

Pentium (80x86), VAX are little-endian IBM 370, Moterola 680x0 (Mac), and most RISC are big-endian Internet is big-endian Makes writing Internet programs on PC more awkward! WinSock provides htoi and itoh (Host to Internet & Internet to Host) functions to convert

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William Stallings Computer Organization and Architecture 6th EditionChapter 10Instruction Sets:Characteristicsand FunctionsWhat is an instruction set?The complete collection of instructions that are understood by a CPUMachine CodeBinaryUsually represented by assembly codesElements of an InstructionOperation code (Op code)Do thisSource Operand referenceTo thisResult Operand referencePut the answer hereNext Instruction ReferenceWhen you have done that, do this...Where have all the Operands gone?Long time passing.(If you don’t understand, you’re too young!)Main memory (or virtual memory or cache)CPU registerI/O deviceInstruction Cycle State DiagramInstruction RepresentationIn machine code each instruction has a unique bit patternFor human consumption (well, programmers anyway) a symbolic representation is usede.g. ADD, SUB, LOADOperands can also be represented in this wayADD A,BSimple Instruction FormatInstruction TypesData processingData storage (main memory)Data movement (I/O)Program flow control Number of Addresses (a)3 addressesOperand 1, Operand 2, Resulta = b + c;May be a forth - next instruction (usually implicit)Not commonNeeds very long words to hold everythingNumber of Addresses (b)2 addressesOne address doubles as operand and resulta = a + bReduces length of instructionRequires some extra workTemporary storage to hold some resultsNumber of Addresses (c)1 addressImplicit second addressUsually a register (accumulator)Common on early machinesNumber of Addresses (d)0 (zero) addressesAll addresses implicitUses a stacke.g. push a push b add pop cc = a + bHow Many AddressesMore addressesMore complex (powerful?) instructionsMore registersInter-register operations are quickerFewer instructions per programFewer addressesLess complex (powerful?) instructionsMore instructions per programFaster fetch/execution of instructionsDesign Decisions (1)Operation repertoireHow many ops?What can they do?How complex are they?Data typesInstruction formatsLength of op code fieldNumber of addressesDesign Decisions (2)RegistersNumber of CPU registers availableWhich operations can be performed on which registers?Addressing modes (later)RISC v CISCTypes of OperandAddressesNumbersInteger/floating pointCharactersASCII etc.Logical DataBits or flags(Aside: Is there any difference between numbers and characters? Ask a C programmer!)Pentium Data Types8 bit Byte16 bit word32 bit double word64 bit quad wordAddressing is by 8 bit unitA 32 bit double word is read at addresses divisible by 4Specific Data TypesGeneral - arbitrary binary contentsInteger - single binary valueOrdinal - unsigned integerUnpacked BCD - One digit per bytePacked BCD - 2 BCD digits per byteNear Pointer - 32 bit offset within segmentBit fieldByte StringFloating PointPentium Floating Point Data TypesPowerPC Data Types8 (byte), 16 (halfword), 32 (word) and 64 (doubleword) length data typesSome instructions need operand aligned on 32 bit boundaryCan be big- or little-endianFixed point processor recognises:Unsigned byte, unsigned halfword, signed halfword, unsigned word, signed word, unsigned doubleword, byte string (<128 bytes)Floating pointIEEE 754Single or double precisionTypes of OperationData TransferArithmeticLogicalConversionI/OSystem ControlTransfer of ControlData TransferSpecifySourceDestinationAmount of dataMay be different instructions for different movementse.g. IBM 370Or one instruction and different addressese.g. VAXArithmeticAdd, Subtract, Multiply, DivideSigned IntegerFloating point ?May includeIncrement (a++)Decrement (a--)Negate (-a)Shift and Rotate OperationsLogicalBitwise operationsAND, OR, NOTConversionE.g. Binary to DecimalInput/OutputMay be specific instructionsMay be done using data movement instructions (memory mapped)May be done by a separate controller (DMA)Systems ControlPrivileged instructionsCPU needs to be in specific state Ring 0 on 80386+Kernel modeFor operating systems useTransfer of ControlBranche.g. branch to x if result is zeroSkipe.g. increment and skip if zeroISZ Register1Branch xxxxADD ASubroutine callc.f. interrupt callBranch InstructionNested Procedure CallsUse of StackExercise For ReaderFind out about instruction set for Pentium and PowerPCStart with StallingsVisit web sitesByte Order (A portion of chips?)What order do we read numbers that occupy more than one bytee.g. (numbers in hex to make it easy to read)12345678 can be stored in 4x8bit locations as followsByte Order (example)Address Value (1) Value(2)184 12 78185 34 56186 56 34186 78 12i.e. read top down or bottom up?Byte Order NamesThe problem is called EndianThe system on the left has the least significant byte in the lowest addressThis is called big-endianThe system on the right has the least significant byte in the highest addressThis is called little-endianExample of C Data StructureAlternative View of Memory MapStandardWhat Standard?Pentium (80x86), VAX are little-endianIBM 370, Moterola 680x0 (Mac), and most RISC are big-endianInternet is big-endianMakes writing Internet programs on PC more awkward!WinSock provides htoi and itoh (Host to Internet & Internet to Host) functions to convert

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