Khoa học máy tính - Chapter 2: The os, the computer, and user programs

Chapter 2The OS, the Computer,and User ProgramsCopyright © 20081An Introduction to Programming with C++, Fifth EditionIntroductionFundamental Principles of OS OperationThe ComputerOS Interaction with the Computer and User Programs2An Introduction to Programming with C++, Fifth EditionFundamental Principles of OS OperationThe kernel of the OS is the collection of routines that form the core of the operating systemImplements control functionsSet of services to user programsExists in memory during operation of the OSAn interrupt diverts the CPU to execution of the kernel codeA software interrupt is used by programs to communicate their requests to the kernel3An Introduction to Programming with C++, Fifth EditionFundamental Principles of OS Operation (continued)CPU has two modes of operation:Kernel modeCPU can execute all instructionsKernel operates with CPU in this mode so that it can control computer operationsUser modeCPU cannot execute instructions that could interfere with other programs or with the OS if used indiscriminatelyCPU is put in this mode to execute user programs4An Introduction to Programming with C++, Fifth EditionThe Computer5An Introduction to Programming with C++, Fifth EditionThe Computer (continued)The CPUMemory Management Unit (MMU)Memory HierarchyInput/OutputInterrupts6An Introduction to Programming with C++, Fifth EditionThe CPUTwo features of the CPU are visible to user programs or the OS:General-purpose registers (GPRs)Also called program-accessible registersHold data, addresses, index values, or the stack pointer during execution of a programControl registersContain information that controls or influences operation of the CPUSet of control registers is called the program status word (PSW)7An Introduction to Programming with C++, Fifth Edition8An Introduction to Programming with C++, Fifth EditionThe CPU (continued)CPU can operate in two modes:Kernel modeCan execute privileged instructionsOS puts CPU in kernel mode when it is executing instructions in the kernelUser modeCannot execute privileged instructionsOS puts CPU in user mode while executing user programsMode (M) field of PSW contains 0 if CPU is in privileged mode and 1 if it is in user mode9An Introduction to Programming with C++, Fifth EditionState of the CPUGPRs and PSW contain the information needed to know what the CPU is doingState of the CPUKernel saves state of CPU when it takes away the CPU from programWhen program is to be resumed, it reloads the saved CPU state into GPRs and PSW10An Introduction to Programming with C++, Fifth EditionExample 2.1: State of the CPU (Contd)11An Introduction to Programming with C++, Fifth EditionMemory Management Unit (MMU)Virtual memory is an illusion of memory that may be larger than the real memory of a computerImplemented using noncontiguous memory allocation and the MMUCPU passes the address of data or instruction used in an instruction to MMUIt is called the logical addressesMMU translates logical address to physical address12An Introduction to Programming with C++, Fifth EditionMemory hierarchyThe memory hierarchy provides a large and fast memory, at a low costIt is an arrangement of several memories with different access speeds and sizesThe CPU accesses only the fastest memory; i.e., the cacheIf a required byte is not present in the memory being accessed, it is loaded there from a slower memory13An Introduction to Programming with C++, Fifth Edition14An Introduction to Programming with C++, Fifth EditionMemory Hierarchy (continued)When CPU performs a cache lookup, a cache hit or miss may occurHit ratio (h) of the cache is the fraction of bytes accessed by the CPU that score a hit in the cache tema = h × tcache + (1 – h) × (ttra + tcache) = tcache + (1 – h) × ttra where tema = effective memory access time, tcache = access time of cache, and ttra = time taken to transfer a cache block from memory to cache.15An Introduction to Programming with C++, Fifth EditionMemory Hierarchy (continued)Operation of memory is analogous to operation of a cacheBlocks of bytes (pages) are transferred from disk to memory or from memory to diskBut,Memory management and transfer of blocks between memory and disk are performed by SWIn the cache, the transfer is performed by HWMemory hierarchy comprising MMU, memory, and the disk is called the virtual memory16An Introduction to Programming with C++, Fifth EditionMemory Hierarchy (continued)Memory protection is implemented by checking whether a memory address used by a program lies outside the memory area allocated to itControl registers used:base and size (also called limit)Address of first byte = Address of last byte = + – 117An Introduction to Programming with C++, Fifth EditionExample 2.2: Basics of Memory Protectioninterrupt Execution of Load instruction causes protection violation18An Introduction to Programming with C++, Fifth EditionInput/Output19An Introduction to Programming with C++, Fifth EditionInterruptsAn event is a situation that requires OS’s attentionDesigner associates an interrupt with each eventPurpose is to report occurrence of the event to OS and enable it to perform event handling actionsInterrupt action saves CPU state and loads new contents into the PSW and GPRsCPU starts executing instructions of an interrupt servicing routine (ISR) in the kernel20An Introduction to Programming with C++, Fifth EditionInterrupts (continued)21An Introduction to Programming with C++, Fifth Edition22An Introduction to Programming with C++, Fifth EditionOS Interaction with the Computer and User ProgramsOS interacts with the computer toknow information about events, so that it can service themrestore CPU state to resume a program after servicing an interruptPrograms need to use services of the OS for purposes such as initiating an I/O operationThe method to cause an interrupt and pass requirement to the OS is known as a System callWill learn about:Controlling Execution of ProgramsInterrupt ServicingSystem Calls23An Introduction to Programming with C++, Fifth EditionControlling Execution of ProgramsWhen user program starts, PSW should contain:Program counter (PC) fieldMode (M) field, set to user mode (1)Memory protection information (MPI) field contains start address in memory and size of programInterrupt mask (IM) field, set to enable interruptsWhen program is interrupted, CPU state (PSW and GPRs) are savedProgram table or process control block (PCB)When program is resumed, its CPU state is restored24An Introduction to Programming with C++, Fifth EditionInterrupt Servicing Context save saves CPU state of the program The scheduler selects a a program for execution25An Introduction to Programming with C++, Fifth EditionInterrupt Servicing (continued)26An Introduction to Programming with C++, Fifth Edition27An Introduction to Programming with C++, Fifth EditionInterrupt Servicing (continued)Two approaches for nested interrupt servicing: Disable nested interrupts through maskingHandle nested interrupts─preemptible kernel28An Introduction to Programming with C++, Fifth EditionSystem Calls29An Introduction to Programming with C++, Fifth EditionExample 2.4: System Call in a Hypothetical OSCPU provides the SI instruction to cause a software interruptOS provides system call for obtaining current timeCode is 78: Instruction SI 78 causes a SW interrupt78 is entered in IC field of PSW before it is savedInterrupt vector for program contains aaa in PCCPU is switched to routine with start address aaaIt finds that IC is 78 and determines that program needs time of dayTime is returned to program in a standard location, typically a data register30An Introduction to Programming with C++, Fifth EditionSystem Calls (continued)31An Introduction to Programming with C++, Fifth EditionSummaryAn interrupt is a special signal sent to CPU to indicate occurrence of an eventIt transfers control to the OSA system call is a SW interruptA program uses it to request OS servicesCPU’s control registers govern its functioningProgram status word (PSW) is the collection of theseOS kernel saves CPU state when interrupt occursi.e., PSW and GPRsCPU has two modes of operation controlled by mode (M) field of PSWUser mode and kernel mode32An Introduction to Programming with C++, Fifth EditionSummary (continued)Memory hierarchy provides the same effect as a fast and large memory, at a low costContains:A very fast and small cache memoryA slower and larger RAMA diskEffective memory access time depends on cache hit ratioI/O system uses direct memory access (DMA) to permit CPU and I/O system to operate independently33An Introduction to Programming with C++, Fifth Edition