Digital Logic Design - Lecture 16: More Multiplexers, Encoders and Decoders

DLDLecture 16More Multiplexers,Encoders and DecodersOverviewBinary decodersConverts an n-bit code to a single active outputCan be developed using AND/OR gatesCan be used to implement logic circuits.Binary encodersConverts one of 2n inputs to an n-bit outputUseful for compressing dataCan be developed using AND/OR gatesBoth encoders and decoders are extensively used in digital systemsMultiplexer as combinational modulesConnect input variables to select inputs of multiplexer (n-1 for n variables)Set data inputs to multiplexer equal to values of function for corresponding assignment of select variablesUsing a variable at data inputs reduces size of the multiplexerImplementing a Four- Input Function with a MultiplexerTypical multiplexer usesDecoderA decoder is a logic circuit that accepts a set of inputs that represents a binary number and activates only the output that corresponds to the input number.In other words, a decoder circuit looks at its inputs, determines which binary number is present there, and activates the one output that corresponds to that number ; all other outputs remain inactiveIn its general form, a decoder has N input lines to handle N bits and form one to 2 N output lines to indicate the presence of one or more N-bit combinations.The basic binary function An AND gate can be used as the basic decoding element because it produces a HIGH output only when all inputs are HIGHBinary DecoderBlack box with n input lines and 2n output linesOnly one output is a 1 for any given inputConvert binary information from n input lines to 2n output lines.Known as n-to-m-line decoder (m = 2n).May be used to generate the 2n minterms of n input variables.BinaryDecoder ninputsm=2n outputsDecoder (Uses)2-to-4 DecoderA 2-to-4 Decoder2 inputs (A1, A0)22 = 4 outputs (D3, D2, D1, D0)2-to-4 DecoderA 2-to-4 Decoder2 inputs (A1, A0)22 = 4 outputs (D3, D2, D1, D0)Truth TableA1A0D0D1D2D30010000101001000101100012-to-4 DecoderA 2-to-4 Decoder2 inputs (A1, A0)22 = 4 outputs (D3, D2, D1, D0)Truth TableA1A0D0D1D2D3001000010100100010110001Src: Mano’s book2-to-4 Decoder with EnableENA1A0D0D1D2D30XX00001001000101010011000101110001Truth Table2-to-4 Decoder with EnableENA1A0D0D1D2D30XX00001001000101010011000101110001Src: Mano’s bookTruth Table2-to-4 Binary DecoderFrom truth table, circuit for 2x4 decoder is:Note: Each output is a 2-variable minterm (X'Y', X'Y, XY' or XY)F0 = X'Y'F1 = X'YF2 = XY'F3 = XYXYTruth Table: 2-to-4DecoderXYF0F1F2F33-to-8 Binary DecoderF1 = x'y'zxzyF0 = x'y'z'F2 = x'yz'F3 = x'yzF5 = xy'zF4 = xy'z'F6 = xyz'F7 = xyzTruth Table: 3-to-8DecoderXYF0F1F2F3F4F5F6F7ZParallel DecodersDecodersParallel is expensiveProblem extending for larger n2n decoders require n-input ANDs: fan-inAlternative: alternate structureDecoder ExpansionImplementing Functions Using DecodersAny n-variable logic function can be implemented using a single n-to-2n decoder to generate the mintermsOR gate forms the sum.The output lines of the decoder corresponding to the minterms of the function are used as inputs to the or gate.Any combinational circuit with n inputs and m outputs can be implemented with an n-to-2n decoder with m OR gates.Suitable when a circuit has many outputs, and each output function is expressed with few minterms.Implementing Functions Using DecodersExample: Full adderS(x, y, z) = S (1,2,4,7)C(x, y, z) = S (3,5,6,7)3-to-8DecoderS2S1S0xyz01234567SCA Boolean function, in sum-of-minterms form, can be implemented using:a decoder to generate the minterms, and an OR gate to form the sum.Any combinational circuit with n inputs and m outputs can be implemented with an n:2n decoder with m OR gates.Good when circuit has many outputs, and each function is expressed with few minterms.Decoders: Implementing FunctionsF1 = A’B’CD + A’BC’D + ABCDExercise: What are F2 and F3 ? Standard MSI Binary Decoders Example74138 (3-to-8 decoder)(a) Logic circuit. (b) Package pin configuration. (c) Function table. Building a Binary Decoder with NAND GatesStart with a 2-bit decoderAdd an enable signal (E)Note: use of NANDs only one 0 active! if E = 0Use two 3 to 8 decoders to make 4 to 16 decoderEnable can also be active highIn this example, only one decoder can be active at a time.x, y, z effectively select output line for wWhen w=0, the top decoder is enabled and the other is disabled. The bottom decoder outputs are all 0’s , and the top eight outputs generate min-terms 0000 to 0111.When w=1, the enable conditions are reversed. The bottom decoder outputs generate min-terms 1000 to 1111, while the outputs of the top decoder are all 0’s.Decoder ApplicationDecoders are used in many types of applications. One example is in computers for I/O selectionComputer must communicate with a variety of external devices called peripherals by sending and/or receiving data through what is known as input/output (I/O) portsEach I/O port has a number, called an address, which uniquely identifies it. When the computer wants to communicate with a particular device, it issues the appropriate address code for the I/O port to which that particular device is connected . The binary port address is decoded and appropriate decoder output is activated to enable the I/O portBinary data are transferred within the computer on a data bus, which is a set of parallel linesEncodersIf the decoder's output code has fewer bits than the input code, the device is usually called an encoder. e.g. 2n-to-n The simplest encoder is a 2n-to-n binary encoderOne of 2n inputs = 1 Output is an n-bit binary number......2ninputsn outputsBinaryencoderEncoding - the opposite of decoding - the conversion of an m-bit input code to a n-bit output code with n £ m £ 2n such that each valid code word produces a unique output codeCircuits that perform encoding are called encodersAn encoder has 2n (or fewer) input lines and n output lines which generate the binary code corresponding to the input valuesTypically, an encoder converts a code containing exactly one bit that is 1 to a binary code corresponding to the position in which the 1 appears.....n outputs2n inputs2n-to-nEncoderEncoders8-to-3 EncoderDescription:23 = 8 inputs, 3 outputsone input =1, others = 0’sEach input generate unique binary code8-to-3 EncoderD0D1D2D3D4D5D6D7A0A1A28-to-3 Encoder (truth table)8-to-3 EncoderD0D1D2D3D4D5D6D7A0A1A2inputsoutputsD7D6D5D4D3D2D1D0A2A1A000000001000000000100010000010001000001000011000100001000010000010101000000110100000001118-to-3 Encoder (truth table)8-to-3 EncoderD0D1D2D3D4D5D6D7A0A1A210000000000inputsoutputsD7D6D5D4D3D2D1D0A2A1A000000001000000000100010000010001000001000011000100001000010000010101000000110100000001118-to-3 Encoder (truth table)8-to-3 EncoderD0D1D2D3D4D5D6D7A0A1A201000000100inputsoutputsD7D6D5D4D3D2D1D0A2A1A000000001000000000100010000010001000001000011000100001000010000010101000000110100000001118-to-3 Encoder (truth table)8-to-3EncoderD0D1D2D3D4D5D6D7A0A1A200000100101inputsoutputsD7D6D5D4D3D2D1D0A2A1A000000001000000000100010000010001000001000011000100001000010000010101000000110100000001118-to-3 Encoder (truth table)8-to-3EncoderD0D1D2D3D4D5D6D7A0A1A200000001111inputsoutputsD7D6D5D4D3D2D1D0A2A1A000000001000000000100010000010001000001000011000100001000010000010101000000110100000001118-to-3 Encoder (equations)8-to-3EncoderD0D1D2D3D4D5D6D7A0A1A2inputsoutputsD7D6D5D4D3D2D1D0A2A1A00000000100000000010001000001000100000100001100010000100001000001010100000011010000000111Note: This truth table is not complete! Why?Output equations:A0 = ?A1 = ?A2 = ?8-to-3 Encoder (equations)8-to-3EncoderD0D1D2D3D4D5D6D7A0A1A2inputsoutputsD7D6D5D4D3D2D1D0A2A1A00000000100000000010001000001000100000100001100010000100001000001010100000011010000000111Output equations:A0 = D1 + D3 + D5 + D7A1 = ?A2 = ?8-to-3 Encoder (equations)8-to-3EncoderD0D1D2D3D4D5D6D7A0A1A2inputsoutputsD7D6D5D4D3D2D1D0A2A1A00000000100000000010001000001000100000100001100010000100001000001010100000011010000000111Output equations:A0 = D1 + D3 + D5 + D7A1 = D2 + D3 + D6 + D7A2 = ?8-to-3 Encoder (equations)8-to-3EncoderD0D1D2D3D4D5D6D7A0A1A2inputsoutputsD7D6D5D4D3D2D1D0A2A1A00000000100000000010001000001000100000100001100010000100001000001010100000011010000000111Output equations:A0 = D1 + D3 + D5 + D7A1 = D2 + D3 + D6 + D7A2 = D4 + D5 + D6 + D78-to-3 Encoder (circuit)8-to-3EncoderD0D1D2D3D4D5D6D7A0A1A2Output equations:A0 = D1 + D3 + D5 + D7A1 = D2 + D3 + D6 + D7A2 = D4 + D5 + D6 + D7A0A1A2D1D3 D5 D7D2D3 D6D7D4D5 D6D78-to-3 Encoder (limitations)Output equations:A0 = D1 + D3 + D5 + D7A1 = D2 + D3 + D6 + D7A2 = D4 + D5 + D6 + D7inputsoutputsD7D6D5D4D3D2D1D0A2A1A00000000100000000010001000001000100000100001100010000100001000001010100000011010000000111Two Limitations:1. Two or more inputs = 1Example: D3 = D6 = 1A2A1A0 = 111All inputs = 0Same as D0 =1Priority EncoderAddress the previous two limitationsTwo or more inputs = 1Consider the bit with highest priorityAll inputs = 0Add another output v to indicate this combination4-to-2 Priority EncoderDescription: 22 = 4 inputs, 2 + 1 outputs Two or more 1’s take highest priority4-to-2 Priority EncoderinputsoutputsD3D2D1D0A1A0V0000XX00001001001X01101XX1011XXX111Description: 22 = 4 inputs, 2 + 1 outputs Two or more 1’s take highest priorityThis is a condensed truth table! It has only 5 rows instead of 16! Row 3 = 2 combinations Row 4 = 4 combinations Row 5 = 8 combinations4-to-2 Priority EncoderinputsoutputsD3D2D1D0A1A0V0000XX00001001001X01101XX1011XXX111Description: 22 = 4 inputs, 2 + 1 outputs Two or more 1’s take highest priority4-to-2 Priority EncoderinputsoutputsD3D2D1D0A1A0V0000XX00001001001X01101XX1011XXX111Description: 22 = 4 inputs, 2 + 1 outputs Two or more 1’s take highest priorityEquations: A0 = D3 + D1 D2’ A1 = D2 + D3 V = D0 + D1 + D2 + D34-to-2 Priority EncoderinputsoutputsD3D2D1D0A1A0V0000XX00001001001X01101XX1011XXX111Description: 22 = 4 inputs, 2 + 1 outputs Two or more 1’s take highest priorityEquations: A0 = D3 + D1 D2’ A1 = D2 + D3 V = D0 + D1 + D2 + D3Encoder Application (Monitoring Unit)ActionEncoderControllerMachine  CodeMachine 1Machine 2Machine nAlarm SignalContoller ResponseEncoder identifies the requester and encodes the valueController accepts digital inputs.DeMultiplexerPerforms the inverse of the operation of a MUXIt has one input line, the input from which is transmitted to one of 2n output linesThe output lines are selected based on the select inputsE1x2 DeMUXSD0 D11x4 DeMUXThe circuit has an input E, the outputs are given by: D0 = E, if S0S1=00 D0 = S1’S0’ E D1 = E, if S0S1=01 D1 = S1’S0 E D2 = E, if S0S1=10 D2 = S1S0’ E D3 = E, if S0S1=11 D3 = S1S0 EE1x4 DeMUXS0 S1D0 D1D2 D3DeMUX/DecoderThe circuit diagram of a 1x4 DeMUX resembles a 2x4 Decoder with an Enable inputFor the decoder, the inputs are A1 and A0, and the signal E is the EnableFor the DeMUX, the inputs S1 and S0 are the select inputs and E is the actual inputD0D1D2D3S1S0ESummaryDecoder allows for generation of a single binary output from an input binary codeFor an n-input binary decoder there are 2n outputsDecoders are widely used in storage devices (e.g. memories) Encoders all for data compressionPriority encoders rank inputs and encode the highest priority input